International Journal of Engineering Technology and Scientific Innovation
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Title:
IMPLEMENTING A RECONFIGURABLE NEURAL BASED DEMODULATOR ON AN FPGA

Authors:
Reyhaneh Pedram, Mohammad Reza Amini

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Reyhaneh Pedram, Mohammad Reza Amini
Department of Electrical Engineering, College of Engineering, Borujerd Branch, Islamic Azad University, Borujerd, Iran

MLA 8
Pedram, Reyhaneh, and Mohammadreza Amini. "IMPLEMENTING A RECONFIGURABLE NEURAL BASED DEMODULATOR ON AN FPGA." IJETSI, vol. 3, no. 1, pp. 32-51, ijetsi.org/more2018.php?id=3.
APA
Pedram, R., & Amini, M. (n.d.). IMPLEMENTING A RECONFIGURABLE NEURAL BASED DEMODULATOR ON AN FPGA. IJETSI, 3(1), 32-51. Retrieved from http://ijetsi.org/more2018.php?id=3.
Chicago
Pedram, Reyhaneh, and Mohammadreza Amini. "IMPLEMENTING A RECONFIGURABLE NEURAL BASED DEMODULATOR ON AN FPGA." IJETSI 3, no. 1 (n.d.), 32-51. http://ijetsi.org/more2018.php?id=3.

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Abstract:
In this study a universal demodulator for BPSK, BFSK, ASK signals is presented. This demodulator is based on neural network techniques and can be developed for any kind of modulation scheme. Regardless of modulation type used by transmitters, this demodulator can detect the transmitted signal bits by passing the signal samples through a probabilistic neural network. Each modulation scheme that is best similar and matched to the incoming signal samples will be determined as a detected pattern and its corresponding bit is detected as a received bit. The demodulator has its own architecture techniques to implement via VHDL code for speed and chip area optimization.